Hi guys!
My GPU is AMD R9 285,which supports OpenCL2.0,and i am tring to use Pipe. But I am confused about the built-in Pipe read and write functions,such as write_pipe, reserver_read_pipe.
reserve_id_t reserve_write_pipe (
pipe gentype p,
uint num_packets)
int write_pipe (pipe gentype p,
reserve_id_t reserve_id,
uint index,
const gentype *p
- For the reserve_write_pipe() function, Description is that
Reserve num_packets entries for writing to pipe p. Returns a valid reservation ID if the reservation is successful.
I don't know what's the meaning of the num_packets argument.
2. For write_pipe() function,Description is that
Write packet specified by ptr to the reserved area of the pipe referred to by reserve_id and index.
What's the meaning of "reserved area of the pipe"? and What's the meaning of "reserve_id " and "index"?
3. If i want to write to Pipe by order(such as work-item 0 writes 0 to the pipe,work-items 1 write 1 to the pipe,.. work-item n writes n to the pipe,so the data in the pipe is "012345……n" ,and 0 is the first one in the pipe),what should I do ?
Can someone help me please? Thanks.
hi_buddy
I assume you read this.
http://developer.amd.com/community/blog/2014/10/31/opencl-2-0-pipes/
I don’t know what’s the meaning of the num_packets argument.
If your pipe contains, say, float4-s, caller thread will be provided a temporary storage for num_packets of float4-s. If you try to write more data than reserved you will hit undefined behavior.
What’s the meaning of “reserved area of the pipe”? and What’s the meaning of "reserve_id " and “index”?
reserve_id is a temporary storage I mention above. It is returned by reserve_write_pipe or workgroup_reserve_write_pipe. Index is just where in that storage you wish to write your data to.
- If i want to write to Pipe by order(such as work-item 0 writes 0 to the pipe,work-items 1 write 1 to the pipe,… work-item n writes n to the pipe,so the data in the pipe is “012345……n” ,and 0 is the first one in the pipe),what should I do ?
Use an ordinary buffer for this. You can only control it across a workgroup. Ordering is undefined otherwise.
To make sure you do not misintrepret pipes mechanism, i’ll tl;dr AMD sample:
For write pipe, they
a) Allocate a temporary storage with work_group_reserve_write_pipe(rng_pipe, szgr);
b) fill each packet in the storage: write_pipe(rng_pipe,rid,lid, &gfrn) (lid = local_id)
c) commit new data into global pipe object by calling work_group_commit_write_pipe(rng_pipe, rid); (rid - temporary storage id)
Exact same thing with read pipe.
Hi Salabar,
I have modified my code under your guidance.It’s ok now.Thanks a lot.
Pipe is the new feature in OpenCL2.0, I just have a try. The order of the data, generated by many workgoups is uncertrain in pipe. So I don’t know what pipe is used for,except for the random number.
I can’t figure out any actual use-case either. Perhaps, you may want to create your software (but not really, since you are using a GPU, lol) renderer and thus, at some point, you will have a function that may or may not emit a primitive based on some clipping techniques. In this case, you generally don’t care how most of the triangles are ordered.
I’ve heard that pipes benefit OpenCL on FPGA since they fit better into the pipelined hardware nature of those devices. They also seem to have some benefit in dynamic parallelism for producer-consumer scenarios. Someday I’ll have a problem where pipes might be the solution and then I’ll study them more!
Except, FGPA manufacterers (or is it only Altera who support OpenCL?) still sit on CL 1.0. And both SVM and server-side dispatch both seem to be too expensive of a feature to be worth implementing, considering they advice not to use floats. I know Altera support some extension called “channels”, but I’m not sure what is it.