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Thread: Pipeline/TMU architecture and multitexturing question

  1. #1
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    Pipeline/TMU architecture and multitexturing question

    I want to add multitexturing into my app but want to make sure that I get the most out of the hardware.

    Question 1:
    ===========
    The Geforce Ti 4200 has 4 pipelines with 2 texture memory units per pipeline.
    Does this mean that it can do 4 sets of multitexturing per clock cycle if the the multitexturing only uses 2 textures?

    i.e.
    MultiTexture 0
    [Texture 0] ----> [Pipeline 0]
    [Texture 1] ____^

    MultiTexture 1
    [Texture 2] ----> [Pipeline 1]
    [Texture 3] ____^

    MultiTexture 2
    [Texture 4] ----> [Pipeline 2]
    [Texture 5] ____^

    MultiTexture 3
    [Texture 6] ----> [Pipeline 3]
    [Texture 7] ____^

    Is my reasoning correct?

    Question 2:
    ===========
    What happens when I want to multitexture 3 textures?
    Does this happen?

    Clock cycle 1
    [Texture 0] ----> [Pipeline 0] ---> IntermediateTexture
    [Texture 1] ____^

    Clock cycle 2
    [IntermediateTexture] ----> [Pipeline *]
    [Texture 2] ______________^

    Thanks
    Paul

  2. #2
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    Re: Pipeline/TMU architecture and multitexturing question

    I forgot to ask Question 3.

    I'm using an old TNT2 at the moment and it only has 1 TMU and 2 pipelines.

    [Texture 0] ----> [Pipeline 0]
    |_______________> [Pipeline 1]

    According to the articles I've read it can do 1 multitexture per clock cycle.

    When I query the opengl driver with GL_MAX_TEXTURE_UNITS_ARB I get the answer 2.

    Now how on earth does it do that?!

    I'm confused.


    [This message has been edited by surgptr (edited 05-03-2003).]

  3. #3
    Senior Member Frequent Contributor
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    Re: Pipeline/TMU architecture and multitexturing question

    Well, first of all, get a GL specification and search for the word "multitexture". You will find a drawing that will help you.

    Stop thinking at different pipelines at the same time. As far as I know, having different pipes increases just speed so there's no such point in considering how many pipes you have while thinking at functionalities. There's very good chance every pipe will process a different pixel (see below).

    Question 1: ... Does this mean that it can do 4 sets of multitexturing per clock cycle if the the multitexturing only uses 2 textures?
    --> Yes, this is correct.
    However, you have to take in consideration the pipes runs in parallel and gives only speed ups. So, you can't have [tex0, tex1] on pipe0 and [tex2, tex3] on pipe1. All the pipes share the same state so all the pipes got the same textures.


    Question 2: What happens when I want to multitexture 3 textures? ...
    --> No, as far as I know. This would mean there's some sort of syncronizing the pipes, and this would be quite hard to implement. You can do it something similar however, by using register combiners (provided you want to stick with fixed function chips) too bad they are not avaiable on TNTs.

    3: Don't actually understand where's the point, however, here's my explaining on how this work.

    In plain GL you have GL_MAX_TEXTURE_UNITS_ARB textures per pixels avaiable at the same time. For every texture, you can define related parameters such as "texcoords" and "texenv" (how texture is blended with other textures active at the moment).

    This means that a TNT can do 1 single-texture pixel per clock or 1 dual-textured pixels per clock.
    A Geforce2 can do 4 single-texture pixel per clock or 4 dual-textured pixels per clock.
    A GeForce3/4 can do 4 single-texture pixel per clock or 4 quad-textured pixels per clock.
    I also remember of some video cards which were able to "distribute" the work so you cand do strange things however, it would be confusing to point this out...

    Are you sure you don't want to take a look at new technologies like fragment programs and programmable pipelines? Do you need something other?

    EDIT: Added "(see below)".
    EDIT: Added little note about rc on tnt.


    [This message has been edited by Obli (edited 05-03-2003).]

    [This message has been edited by Obli (edited 05-03-2003).]

  4. #4
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    Re: Pipeline/TMU architecture and multitexturing question

    Thanks for that explanation - the hardware side of things makes more sense to me now.

    I'll ask about multitexturing in another thread because it's a long question.

    Paul

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